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Digital Logic Circuits (DLC) Practice Test
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A Digital Logic Circuits (DLC) uses digital inputs to make logical decisions and produce digital outputs. Every logic circuit requires at least one input, before it can produce any kind of output. Digital logic inputs and outputs are usually binary - there can only be one of two possible values. There are two basic types of logic circuitry: combinational circuitry and state circuitry. Combinational circuitry behaves like a simple function. The output of combinational circuitry depends only on the current values of its input. State circuitry behaves more like an object method. All digital... Show more
Digital Logic Circuits (DLC) Practice Test
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25 Questions

1. What is the first state of FSM?
2. Moore machine has states than a mealy machine.
3. A variable on its own or in its complemented form is known as a _____________
4. The truth table for an S-R flip-flop has how many VALID entries?
5. Shift registers comprise of which flip-flops?
6. Latch is a device with _____________
7. The full form of SR is _____________
8. Internal propagation delay of asynchronous counter is removed by _____________.............
9. Divide the binary number (011010000) by (0101) and find the quotient
10. In digital logic, a counter is a device which _____________.............
11. Which of the following describes the operation of a positive edge-triggered D flip-flop?
12. The output of a subtractor is given by (if A, B and X are the inputs).
13. The addition of two decimal digits in BCD can be done through _____________.............
14. Synchronous counter is a type of _____________.............
15. The parallel outputs of a counter circuit represent the _____________.............
16. What is the first step in writing the VHDL for an FSM?
17. Which IC is used for the implementation of 1-to-16 DEMUX?
18. What is a fusing process?
19. How many different states does a decade counter count?
20. Which insulating layer used in the fabrication of MOSFET?
21. When a high is applied to the Set line of an SR latch, then _____________
22. The D flip-flop has input.
23. What is meant by parallel load of a shift register?
24. The check sum method of testing a ROM _____________.............
25. In 1-to-4 demultiplexer, how many select lines are required?