1. ______________ register is used for the purpose of controlling the status of each interrupt request in parallel priority interrupt.

2. The starting address sent by the device in vectored interrupt is called as __________

3. The signal sent to the device from the processor to the device after receiving an interrupt is ___________

4. When the process is returned after an interrupt service ______ should be loaded again.
i. Register contents
ii. Condition codes
iii. Stack contents
iv. Return addresses

5. The processor indicates to the devices that it is ready to receive interrupts ________

6. In DMA transfers, the required signals and addresses are given by the __________

7. From amongst the following given scenarios determine the right one to justify interrupt mode of data transfer.
i. Bulk transfer of several kilo-byte
ii. Moderately large data transfer of more than 1kb
iii. Short events like mouse action
iv. Keyboard inputs

8. Which interrupt is unmaskable?

9. The added output of the bits of the interrupt register and the mask register is set as an input of ______________

10. The registers of the controller are ______

11. When the process requests for a DMA transfer?

12. CPU as two modes privileged and non-privileged. In order to change the mode from privileged to non-privileged.

13. Which one of the following is true with regard to a CPU having a single interrupt request line and single interrupt grant line?
i. Neither vectored nor multiple interrupting devices is possible.
ii. Vectored interrupts is not possible but multiple interrupting devices is possible.
iii. Vectored interrupts is possible and multiple interrupting devices is not possible.
iv. Both vectored and multiple interrupting devices are possible.

14. The processor indicates to the devices that it is ready to receive interrupts ________

15. The resistor which is attached to the service line is called _____

16. Which table handle stores the addresses of the interrupt handling sub-routines?

17. An interrupt that can be temporarily ignored is ___________

18. Input or output devices that are connected to computer are called ______________.

19. CPU as two modes privileged and non-privileged. In order to change the mode from privileged to non-privileged.

20. Interrupts initiated by an instruction is called as _______

21. The advantage of I/O mapped devices to memory mapped is ___________

22. The 8085 microprocessor responds to the presence of an interrupt ___________

23. The technique whereby the DMA controller steals the access cycles of the processor to operate is called __________

24. After the completion of the DMA transfer, the processor is notified by __________

25. A single Interrupt line can be used to service n different devices.