Home > Computer Engineering > Quizzes > Microprocessor: 8086 Interrupts
Microprocessor: 8086 Interrupts
Fast practice, instant feedback. Timer auto-submits when time’s up.
Avg score: 31% • Most missed: “The type of the interrupt may be passed to the interrupt structure of CPU from”
Microprocessor: 8086 Interrupts
Time left 00:00
25 Questions

1. If an interrupt is generated from outside the processor then it is an
2. In a cascaded mode, the number of vectored interrupts provided by 8259A is
3. When non-specific EOI command is issued to 8259A it will automatically
4. The port that is used for the generation of handshake lines in mode 1 or mode 2 is
5. The data bus buffer is controlled by
6. When the CPU executes IRET,
7. The function, .
8. The type of the interrupt may be passed to the interrupt structure of CPU from
9. During the execution of an interrupt, the data pushed into the stack is the content of
10. If the interrupt is generated by the execution of an interrupt instruction then it is
11. The number of hardware interrupts that the processor 8085 consists of is
12. If A1=0, A0=1 then the input read cycle is performed from
13. The input provided by the microprocessor to the read/write control logic is
14. The device that receives or transmits data upon the execution of input or output instructions by the microprocessor is
15. All the functions of the ports of 8255 are achieved by programming the bits of an internal register called
16. Example of an internal interrupt is
17. Once the ICW1 is loaded, then the initialization procedure involves
18. The interrupt control logic
19. When the PS(active low)/EN(active low) pin of 8259A used in buffered mode, then it can be used as a
20. The pin that clears the control word register of 8255 when enabled is
21. The register that stores the bits required to mask the interrupt inputs is
22. At the end of ISR, the instruction should be
23. Programmable peripheral input-output port is another name for
24. After every response to the single step interrupt the flag that is cleared is
25. In the application where all the interrupting devices are of equal priority, the mode used is

⚡ Recently practiced quizzes in this topic
Live quiz activity
Information Technology Knowledge Test Computer Network MCQs General CS (Computer Science) Knowledge Test Big Data: NoSQL Green Computing Practice Test Natural Language Processing: Word Level Analysis Computational Thinking Concepts Computer Fundamentals Practice Test Operating Systems Practice Test: Introduction to OS Computer Fundamentals Practice Test: Generations of Computers
 
❤ If you liked Fatskills, consider supporting us by checking out The Life Manuals You Never Got.

🌈  Our mission is to help improve your scores in any subject and exam withonline quizzes, practice tests, study guides, & advice for students. Since 2018.
About | Explore | User Guide | Topics | Subjects | Doubt Solver | Career Aptitude Test | Answers | Free Tools | OSHA Basics Quiz | What Should We Know?
Privacy | Terms |
Without work one finishes nothing. - Ralph Waldo Emerson
© 2026 Fatskills.com

All trademarks, logos and brand names are the property of their respective owners. All company, product and service names used in this website are for identification purposes only. Use of these names, trademarks and brands does not imply endorsement.