Embedded Processors
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Embedded Processors
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25 Questions

1. Which function/s is/are provided by Integrated Memory Management Unit in 80386 architecture?
2. How is the nature of instruction size in CISC processors?
3. Which kind of low-order 16 bits control register is also regarded as ‘Machine Status Word’ (MSW) in order to make it compatible with i286?
4. In the test registers, what do/does the linear address bit hold/s with respect to TLB (Translation Look-aside Buffers)?
5. In TMS 320 C5X processor, which memory segment provides interfacing to external memory mapped peripherals and also serves as extra data storage space?
6. What is/are the configuration status of control unit in RISC Processors?
7. In ADSP 21 xx architecture, how many previously executed instructions are stored in instruction cache of cache memory?
8. In CPU structure, which register provides the address for fetching of data or instruction especially by means of processor?
9. Which type of non-privileged processor mode is entered due to raising of high priority of an interrupt?
10. Which parameter/s is/are included in ‘Time to market’ design metric of an embedded system?
11. In Modbus Protocol, which codes are included in Request PDU?
12. In ISA, what is/are the application/s of Timer2 which acts as a speaker timer?
13. In CPU structure, what kind of instruction to be executed is held by an instruction Register (IR)?
14. In Pentium processor, which write buffer is used by the pipeline ALUs in order to write the result to the memory?
15. Which type of handshake packet indicates that the device is incapable of accepting data as it is supposed to be busy with some another task?
16. In CPU structure, where is one of the operand provided by an accumulator in order to store the result?
17. In Intel x86 architecture, which general purpose register is used for repeated string instructions as well as shift, rotate and loop instructions?
18. Which type of branching instructions of thumb possesses 11-bit address & is generally applicable for slightly longer jumps in order to implement the instructions like GOTO of high level languages?
19. How are the instructions executed in DSP Processors?
20. In Von Neumann architecture, which among the following handles all the operations of the system that are inside and outside the processor?
21. Which category of function code represents the currently used codes by some companies especially for legacy products?
22. In DAC 0808, which among the following is configured as a reference in addition to R-2R ladder and current switches?
23. Which control register in x86 family is reserved for future use and generally not adopted for current implementation?
24. Which interrupt controller is present in Cortex-A15 processor?
25. Which among the following is/are integrated by OTG controller in order to implement OTG dual-role device functionality?

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